David M. Brooks

David M. Brooks

  • Haley Family Professor of Computer Science

Profile

Professor Brooks' research focuses on the interaction between the architecture and software of computer systems and underlying hardware implementation issues. A major focus of his research has been to explore how lower-level design issues such as power dissipation and chip cooling can be modeled and addressed when making early-stage architectural decisions in computer systems.

Exploring new architectures and software techniques that are aware of energy, temperature, and other lower-level design metrics is extremely important when designing modern computer systems. New emphasis on computer systems that optimize design metrics besides raw performance, such as battery life, form-factor, and cost-efficiency provide many new challenges for system designers. As the underlying technology continues to evolve, new design issues arise and existing challenges become more difficult. In many cases, architectures that are aware of these issues provide superior overall solutions.

Professor Brooks' recent work has focused on linking architectural performance simulators with early stage power and temperature models. The methodology behind this work has been applied to academic research tools such as Wattch. Similar tools have been developed and used within industry, both for research and in early stage ower-analysis of product designs.

Contact Information

Office:141 Maxwell Dworkin
Email:dbrooks@seas.harvard.edu
Office Phone:(617) 495-3989
Assistant:Carol Harlow
Assistant Office:Maxwell Dworkin 343
Assistant Phone:(617) 496-1440

Primary Teaching Area

Positions & Employment

Harvard School of Engineering and Applied Sciences

  • July 2009-Present: Gordon McKay Professor of Computer Science

  • July 2006-June 2009: John L. Loeb Associate Professor of the Natural Sciences

Harvard Division of Engineering and Applied Sciences

  • September 2002-July 2006: Assistant Professor of Computer Science

IBM T.J. Watson Research Center

  • September 2001-September 2002: Research Staff Member

Princeton University

  • July 1997-September 2001: Research Assistant

IBM T.J. Watson Research Center

  • June 2000-September 2000: Research Intern

Intel Corporation

  • June 1999-September 1999: Research Intern

Other Experience & Professional Membership

Conference Organization Activities

  • General Chair, International Symposium on Performance Analysis of Systems and Software, 2011.
  • Workshops Chair, International Symposium on Computer Architecture, 2011.
  • Program Committee, International Symposium on High-Performance Computer Architecture, 2011.
  • Program Committee, International Conference on Supercomputing, 2011.
  • Program Committee, International Conference on High-Performance Embedded Architectures and Compilers, 2010.
  • Program Committee, International Conference on Parallel Architectures and Compilation Techniques, 2010.
  • Program Committee, International Symposium on Low Power Electronics and Design, 2010.
  • Program Chair, International Symposium on Performance Analysis of Systems and Software, 2010.
  • Program Committee, International Symposium on High-Performance Computer Architecture, 2010.
  • Program Committee, International Symposium on Computer Architecture, 2009.
  • Workshops/Tutorials Co-Chair, International Symposium on Microarchitecture, 2009.
  • External Program Committee, International Symposium on Programming Language Design and Implementation, 2009.
  • Steering Committee, NSF Workshop on Science of Power Management, 2009.
  • Program Committee, Special Issue of IEEE Micro's Top Picks from Computer Architecture Conferences, 2009.
  • Program Committee, International Symposium on High-Performance Computer Architecture, 2009.
  • Program Committee, International Conference on Parallel Architectures and Compilation Techniques, 2009.
  • Program Committee, International Symposium on Low Power Electronics and Design, 2009.
  • Program Committee, International Conference on Computer Design, 2009.
  • Program Committee, International Symposium on Performance Analysis of Systems and Software, 2009.
  • Vice Program Chair, Computer Architecture Track, International Symposium on Computer Architecture and High-Performance Computing, 2009
  • Program Committee, International Parallel and Distributed Processing Symposium, 2009.
  • Program Committee, International Symposium on High-Performance Computer Architecture, 2008.
  • Program Committee, International Symposium on Low Power Electronics and Design, 2008.
  • Program Committee, ACM International Conference on Computing Frontiers, 2008.
  • Program Committee, International Symposium on Performance Analysis of Systems and Software, 2008
  • Technical Program Committee Co-Chair, Special Issue of IEEE Micro Micro's Top Picks from Computer Architecture Conferences, 2008.
  • Program Committee, International Symposium on Microarchitecture, 2007.
  • Program Committee, International Symposium on Low Power Electronics and Design, 2007.
  • Publication Chair and Program Committee, International Symposium on Performance Analysis of Systems and Software, 2007.
  • Program Vice-Chair, and Program Committee, Technology-Driven Architectures, ACM Interna- tional Conference on Computing Frontiers, 2007.
  • Program Committee, Special Issue of IEEE Micro Micro's Top Picks from Computer Architecture Conferences, 2007.
  • Program Committee, International Symposium on High-Performance Computer Architecture, 2007.
  • Program Committee, International Symposium on Performance Analysis of Systems and Software, 2007.
  • Program Committee, International Conference on Architectural Support for Programming Languages and Operating Systems, 2006.
  • Track Co-chair (with Michael Gschwind), Processor Architecture Track, International Conference on Computer Design, 2006.
  • Program Committee, International Symposium on High-Performance Computer Architecture, 2006.
  • Program Committee, International Symposium on Performance Analysis of Systems and Software, 2006.
  • Program Committee, International Parallel and Distributed Processing Symposium, 2006.
  • Program Committee, International Conference on Parallel and Distributed Systems, 2006.
  • Track Co-chair (with Michael Gschwind), Processor Architecture Track, International Conference on Computer Design, 2005.
  • Program Committee, International Symposium on Low Power Electronics and Design, 2005.
  • Program Committee, International Conference on Computer Design, 2004.
  • Registration and Finance Chair, International Symposium on Microarchitecture, 2004.
  • Program Committee, International Symposium on Low Power Electronics and Design, 2004.
  • Program Committee, International Conference on Computer Design, 2003.
  • Program Committee, International Symposium on High-Performance Computer Architecture, 2003.
  • Program Committee, International Symposium on Performance Analysis of Systems and Software, 2002.
  • Program Committee, International Symposium on Performance Analysis of Systems and Software, 2001.
  • Web and Publicity Co-Chair, International Symposium on Performance Analysis of Systems and Software, 2001.

Journal Review Activities

  • IEEE Journal of Solid-State Circuits (JSSC)
  • IEEE Transactions on Very Large Scale Integration Systems (TVLSI)
  • IEEE Transactions on Computers
  • IEEE Transactions on Computer-Aided Design
  • IEEE Transactions on Parallel and Distributed Systems
  • IEEE Micro
  • IEEE Computer
  • IEEE Computer Architecture Letters
  • IEEE Pervasive Computing
  • ACM Transactions on Architecture and Code Optimization
  • ACM Transactions on Design Automation of Electronic Systems
  • ACM Transactions on Embedded Computer Systems
  • ACM Transactions on Sensor Networks
  • ACM Journal of Emerging Technologies in Computing
  • Journal of Parallel and Distributed Computing.
  • IET Computers and Digital Techniques

 

Honors

  • Papers selected for IEEE Micro's Top Picks in Computer Architecture" special issue in 2005, 2007, 2008, and 2009.
  • Best Paper Award, International Symposium on High-Performance Computer Architecture, 2009
  • DARPA/MTO Young Faculty Award, 2007
  • 1st Prize, Phase 2 of SRC SoC Design Challenge, October, 2006
  • 2nd Prize, Phase 1 of SRC SoC Design Challenge, October, 2005
  • Best Paper Award, International Symposium on Microarchitecture, 2005
  • National Science Foundation CAREER Award, February, 2005
  • IBM Faculty Partnership Award, 2004-2005
  • MICRO 2002 paper selected as one of the four Best IBM Research Papers in Computer Science, Electrical Engineering and Math published, 2002
  • National Science Foundation Graduate Research Fellow, 1998-2001
  • Princeton University Gordon Wu Graduate Fellow, 1997-2001
  • University of Southern California Trustee Scholar, 1993-1997

Patents Awarded

  • Process Variation Tolerant Circuit With Voltage Interpolation And Variable Latency, US Patent #: 7,667,497, Granted 2010.
  • Ultra Low Power System for Sensor Network Applications, Patent Application #: 11,685,721, Filed Mar. 2007.
  • Processor with Low Overhead Predictive Supply Voltage Gating for Leakage Power Reduction, US Patent #: 7,134,028, Granted 2006.
  • System and Method of Operand Value Based Processor Optimization by Detecting a Condition of Pre-Determined Number of Bits and Selectively Disabling Pre-Determined Bit-Fields by Clock Gating,
  • US Patent #: 6,745,336, Granted 2004. Memory Structures Having Selectively Disabled Portions for Power Conservation, US Patent #:
  • 6,298,002, Granted 2001, US Patent #: 6,473,326, Granted 2002, US Patent #: 6,577,524, Granted 2003.
  • Adaptive Issue Queue for Reduced Power at High Performance, Filed 2001.